A NAND type non-volatile memory device has been developed, which includes a memory cell array of a three-dimensional structure. The memory cell array includes, for example, word lines stacked on a source layer, a channel body extending through the word lines, and a memory cell provided between each word line and the channel body. Moreover, for example, an interconnection layer including a source line and a bit line is provided on a side of the word lines opposite to a source layer. Then, the channel body is electrically connected to the source layer and the bit line. In addition, the source layer is electrically connected to the source line by a conductive body provided through the word lines. Thus, a NAND string that includes memory cells is provided along the channel body.
In a manufacturing process of the memory cell array, a memory film and a channel body are formed in a memory hole that extends through the word lines to the source layer. The memory film includes a charge storage portion between the word line and the cannel body, which serves as the memory cell. The memory film is also an insulation film which electrically insulates the word line and the channel body, and thus, a process of selectively removing the memory film at the bottom of the memory hole is necessary to electrically connect the channel body and the source layer. In some cases, the channel body and the source layer are formed together, and the source layer that is formed under the word lines is covered with the memory film. In such a case, a process of selectively removing the memory film is also required to electrically connect the source layer and the source interconnection via the conductive body. Such a process may become more difficult as the miniaturization of the memory cell array progresses. That is, a process margin for selectively removing the memory film becomes smaller, and the small margin may generate unintentional over-etching in other portions. Hence, a non-volatile memory device and a manufacturing method thereof are required, which provides a large process margin for selectively removing the memory film.